12 SME · vertical broadcast
ADDVA
One vector runs down every active column of the ZA tile.
addva za0.s, p0/m, p1/m, z0.sTypes: 32-bit integer — the z0.s lanes and the 4 × 4 za0.s tile are all 32-bit containers. ADDVA's .s class is the integer form (its .d twin is the 64-bit integer variant); ADDVA has no floating-point form. Drawn at SVL = 128 bits; at SVL = 512 the tile is 16 × 16 and one vector still lands in every column.
p0/m
z0.s
p1/m
0,00
0,11
0,20
0,32
1,01
1,10
1,22
1,30
2,00
2,11
2,20
2,31
3,02
3,10
3,21
3,30
ZA[i, j] += z0.s[i]
Ready. The tile still holds the values it had before this ADDVA.
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Reading the picture
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Down every column
For each active pair, ZA[i, j] gains z0.s[i]: the vector is added to every vertical slice that the column predicate allows. The value depends on the row, and it is the same in every column. One instruction, a whole-tile update.
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Two predicates, like ADDHA
p0/m governs rows and p1/m governs columns — the same shape as ADDHA. There the column picks the value; here the row does, and it is the same in every column. p1 lane 2 starts off, so column 2 holds still.
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ADDHA is the twin
ADDHA is the horizontal twin: ZA[i, j] gains z0.s[j], so the vector runs along every active row instead of down every column. Play ADDHA
This pass broadcasts z0.s = {1, 2, 3, 4} down the columns.